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FMECA Modeling - A New Approach |
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Modeling and Simulation |
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Quality and Product Assurance |
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Risk Assessment/Analysis |
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Software tools for R&M |
AbstractFMECA tools must be included into the designer's tools suit in order to support the new vision for concurrent engineering environment. To support this new vision we introduce a major enhancement to the Failure Mode Effects and Criticality Analysis (FMECA) to provide more accurate, simpler, more accessible and frequently used computerized analysis tool. We introduce new terminology to enhance the well-known standards, while assuring their full support. Using the new terminology, functional trees become very similar to the project trees, e.g. the time spent on constructing the functional trees is reduced by factors. FMECA is used to analyze systems assemblies failure modes effects on the overall system functionality (end-effects). The FMECA results serves as the main input to define Built In Tests (BIT) that can automatically detect and isolate system failures as they occur and act as required to increase system availability. In this article we present a new approach to the FMECA algorithm. The basis for this new approach is two-folded: · Introducing new FMECA terms: "Good Modes" (GM) and "Next Brother Effects" (NBE). · Binding together the system Reliability Block Diagram (RBD) and the FMECA analysis. In order to do so, we use an innovative algorithm for virtual dynamic functional trees. This computerized algorithm automatically constructs a separate functional tree for each failure mode. These terms lead to a much more flexible computerized failure modes analysis tools mechanism and, most important, BIT definitions enhancement, which increase systems reliability and shortens maintenance times.
Objective
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Solving FMECA standards draw-backs |
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Offering new FMECA approach |
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Enhancing systems reliability and availability via BIT enhancement |
Traditionally, the FMECA is performed using the system functional tree. This tree represents signals/data flow from the lowest level functional block (a leaf) up through its higher level functional blocks, using the Next Higher Effect (NHE) term.
The existing standards approach draw-back is clearly apparent in the new high-tech ASICs, mainly CPUs, where each component fulfills a large set of functions, which are not related directly. The only reasons for including them into a single ASIC are space and cost. For example there are micro-controllers that include Communication, Chip select and I/O mechanisms where in case one of them fails, the other may be fully operational.
To better visualize the problem, consider the project tree presented in Figure 1.A. Assume the ASIC fulfills two functions (A and B) where failure of function A affects function 1.1 and failure of function B affects function 1.2. The functional tree for this case is as presented in Figure 1.B.

The ASIC failure rate can be predicted by any prediction method. The rate of function A failure is the multiplication of the ASIC failure rate by a user defined ratio aA. The rate of function B failure is the multiplication of the ASIC failure rate by a user defined ratio aB. The a's sum should never exceed 1, as all the functions failure rate can not exceed the ASIC failure rate.
The traditional FMECA tools support such case by forcing the analyst to create the split ASIC tree as described in figure 2.B and remember all the a's in order to make sure their sum does not exceed 1. In cases where there are many sub functions, the a's handling becomes impossible to maintain.
As stated above, the new approach introduces the new terminology for Next Brother Effect (NBE). In that case, the functional tree may be identical to the project tree, as presented in Figure 2

The NBE is used here to propagate the ASIC failure modes to its brothers in the hierarchic functional tree. Function A failure mode is propagated, by the computerized program tool, to function 1.1 and function B failure mode to function 1.2. This method completely and accurately supports the required functional tree as presented in Figure 1.B. In addition it assures that the a’s sum, as explained earlier, will never exceed 1.
Evidently, in most cases, the NBE methodology provides the designers with capabilities to use the project tree as a functional tree and thus reduce, in most cases, the need for the construction and maintenance of a separate functional tree. Thus, the PCB and systems designers, supporting the concurrent engineering approach can perform the FMECA.
The usage of NBE opens the door for a tremendous improvement of BIT designs in the name of Good Modes (GM). In case a sub-block fails (function A in our example) it may cause the next function (1.2 for example) to change its functionality to a new state where it is still operational. For example, in case a CPU controls two redundant valves, identified failure of one valve will cause the software to use only the second valve, yet using the second valve is a Good Mode.
In any one of the functional tree levels, a good mode NBE or NHE may be a failure mode. Thus, the algorithm propagates good modes in the functional tree in identical way to the failure modes. The computerized tool calculates the good mode "positiveness", e.g. its occurrence rate. A good mode signals a failure in the system while the "positiveness" is a good factor that means how well the system can identify a failure. The designer can use both, the "positiveness" and the criticality values, in making decision whether it is cost effective to develop the specific BIT.
It is evident that the good mode terminology can improve the BIT design. It assures, mainly for mixed hardware-software system, that a failure mode is identified by brother of higher hierarchic levels, and thus assures its identification.
The RBD describes systems blocks and sub-blocks dependence in reliability point of view. In many cases (such as telecommunication network) one can view a well-designed RBD in a functional tree structure, e.g. it can be directly used for FMECA. In the article we elaborate the algorithm and method to computerize this approach.
We showed in this abstract that by using new terminology of "Next Brother Effect" and "Good Modes" as part of the FMECA and BIT computerized tools:
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We introduced new terminology to enhance the well-known standards, while assuring their full support. |
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Functional trees can become very similar to the project trees, functional trees construction time is reduced by factors. |
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Designers can have greater flexibility in describing the failure modes and achieve more accurate and more accessible BIT designs. |