Automated Schematic Review Driven by Electrical Stress Analysis

Many electrical engineers spend most of their time developing electronic boards. This includes functional specifications, design, simulations and testing of the product. At the end of the process, they often wonder whether their product is robust and reliable.

Have you done everything to ensure that all design errors were eliminated?
Are you certain that your customer will not experience failures?

You may think that you took all measures, yet the reality might be different.


Are you familiar with the following pictures?

Reliability Verification Test

Due to market pressure and lack of tools, hidden design errors remain undetected. Often times, it does not take long for the customer to experience failures. This negatively affects the company’s reputation and results in financial losses.
In the best case scenario, the design flaws are detected during the prototype approval test of the final product. In this case, an in-depth investigation is required in order to locate the root-cause of the error. This can take a few days if not a few weeks.
At this time the development team is busy finding the root-cause of the design error and the manufacturing line is on hold. This causes a delay in the final product launch, creating cost losses, which are critical for the success of the project.


The Need for a Robustness Verification Test

The main problem in the current method of detecting design errors is the lack of a “Specification for Reliability / Robustness Design Verification”. We are familiar with the term “Qualification Test” derived from the “Quality Verification” Specification that tests the final product.
There is no Specification for the “Relification™ Test” derived from “Reliability Verification Test” that tests the design reliability and robustness.
In order to prepare the spec for the “Qualification Test”, many documents are prepared describing the product, its functionality, the signals at the connectors, etc. For the “Reliability Verification Test” case, there is no methodology, and most companies only test the Service Life of their products. There is no Good Engineering Practice specification, there are no robustness test documents and of course, no test methodology. In most cases, Design Rule Check (DRC) error messages are examined and manual checks and design reviews are performed. However, this takes much time and effort, and sometimes there are so many DRC error messages that the designers just ignore them.


The New Reliability/Robustness Verification Methodology 

The proposed solution is to first define a standard which includes suitable Good Design Practice rules for the company products, according to the component technologies used in the circuits. At the beginning, the user may check all the rules manually, but the final idea is to use a new generation of simulation and analysis tools that include hundreds of rules, which check a design in a few minutes.